Skip to main navigation Skip to search Skip to main content

A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration

  • Mingyang Gu*
  • , Yunsong Tao
  • , Xiyu He
  • , Yi Zhong
  • , Lu Jie
  • , Nan Sun
  • *Corresponding author for this work
  • Tsinghua University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This work proposes a one-stage correlation-based background timing-skew calibration method. It detects timing-skew errors of all channels simultaneously and relaxes the input bandwidth limitation up to the Nyquist frequency, ensuring fast and robust convergence. It enables an 11b1GS/s4-channel time-interleaved SAR ADC that achieves the best FoMs of l70.6dB and FoMw of 4. 9fJ/conv-step among all reported ADCs with f s >600MS/s.

Original languageEnglish
Title of host publicationESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference
PublisherIEEE Computer Society
Pages145-148
Number of pages4
ISBN (Electronic)9798350304206
DOIs
Publication statusPublished - 2023
Externally publishedYes
Event49th IEEE European Solid State Circuits Conference, ESSCIRC 2023 - Lisbon, Portugal
Duration: 11 Sept 202314 Sept 2023

Publication series

NameEuropean Solid-State Circuits Conference
Volume2023-September
ISSN (Print)1930-8833

Conference

Conference49th IEEE European Solid State Circuits Conference, ESSCIRC 2023
Country/TerritoryPortugal
CityLisbon
Period11/09/2314/09/23

Keywords

  • background calibration
  • correlation-based timing-skew calibration
  • SAR analog-to-digital converter (ADC)
  • time-interleaved (TI) ADC

Fingerprint

Dive into the research topics of 'A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration'. Together they form a unique fingerprint.

Cite this