Abstract
On-board Synthetic Aperture Radar(SAR)imaging technology is a key tool for time-sensitive remote sensing applications such as disaster monitoring and military reconnaissance. The typical construction of an on-board SAR imaging system using a Field-Programmable Gate Array(FPGA)coupled with a Digital Signal Processor(DSP)as the processing core is well-regarded for its heterogeneous computing power,energy efficiency,and flexibility. However,current FPGA+DSP systems are still under-researched in terms of algorithm support,large-grain processing,on-chip parallel acceleration,and complex matrix transposition,with significant room for performance enhancement. This paper analyses the Nonlinear Chirp Scaling(NCS)algorithm,suitable for large squint,high-resolution imaging,and partitions the algorithm into main and auxiliary paths based on computational complexity and type. A heterogeneous mapping scheme for the NCS algorithm within the FPGA+DSP system is subsequently proposed. To address the transformation of data storage formats post multi-channel Fast Fourier Transform(FFT)processing,which complicates pipelined processing,this work introduces a multi-channel FFT collaborative method based on time-frequency extraction switching to ensure efficient parallel FFT operations. Additionally,to handle the complexity of transpose requirements across various granularities and parallelisms,a universal cross transpose solution using X-Direct Memory Access(XDMA)and on-chip segmented transposition is developed. Employing two VX690T FPGAs and two FT 6678 DSPs as core processors,this paper presents the development of an on-board SAR imaging card that implements the proposed system design. Moreover,a validation environment using simulated sources plus ground testing is established,processing simulation array data for strip/scan/spotlight/sliding spotlight/TOPS modes and actual data for strip/sliding spotlight modes. The array data demonstrates a two-dimensional peak sidelobe ratio of about −13.2 dB and an integrated sidelobe ratio of around −10.1 dB,indicative of good imaging quality. For instance,in strip mode with an image size of 32K×16K,the average imaging time using the NCS algorithm is 7.81 seconds,markedly accelerating imaging speed compared to existing approaches.
Translated title of the contribution | Hardware Implementation Design for An Efficient On-board Imaging Processing System in Spaceborne SAR |
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Original language | Chinese (Traditional) |
Pages (from-to) | 138-151 |
Number of pages | 14 |
Journal | Journal of Signal Processing |
Volume | 40 |
Issue number | 1 |
DOIs | |
Publication status | Published - Jan 2024 |