Development of pseudorandom sequence agile frequency hopping frequency synthesizer

De Chun Guo; Yuan Chun Fei

Development of pseudorandom sequence agile frequency hopping frequency synthesizer

De Chun Guo^*, Yuan Chun Fei

^*Corresponding author for this work

School of Integrated Circuits and Electronics

Beijing Institute of Technology

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

An approach of a low spurious, low phase noise, agile frequency synthesizer was presented. The synthesizer adopted DDS chip (AD9852) as the excitation for the PLL chip (Q3236) and TMS320C31 of TI as its control unit. By combining the Iutra-high frequency resolution of DDS and the high operation frequency of PLL, better performance can be achieved. The phase noise of the synthesizer output is less than-100 dB/Hz (away from carrier 1 kHz) and the spurious level is less than-60 dB.

Original language	English
Pages (from-to)	753-756
Number of pages	4
Journal	Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology
Volume	21
Issue number	6
Publication status	Published - 2001

Keywords

Direct digital frequenecy synthesizer
Frequency hopping
PLL
Pseudorandom sequence

Cite this

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AU - Fei, Yuan Chun

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AB - An approach of a low spurious, low phase noise, agile frequency synthesizer was presented. The synthesizer adopted DDS chip (AD9852) as the excitation for the PLL chip (Q3236) and TMS320C31 of TI as its control unit. By combining the Iutra-high frequency resolution of DDS and the high operation frequency of PLL, better performance can be achieved. The phase noise of the synthesizer output is less than-100 dB/Hz (away from carrier 1 kHz) and the spurious level is less than-60 dB.

KW - Direct digital frequenecy synthesizer

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KW - PLL

KW - Pseudorandom sequence

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JF - Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology

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ER -

Development of pseudorandom sequence agile frequency hopping frequency synthesizer

Abstract

Keywords

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